1. Field of the Invention
The present invention relates to the transmission and receipt of digital data. More particularly, the invention concerns the exchange of a digital data input stream where a transmitter sends the digital data input stream to a receiver, the receiver sequentially dividing the stream into different interleaved substreams and later combining the substreams to reconstruct the original digital data input stream.
2. Description of the Related Art
Many electronic machines, such as computers, are made up of multiple different subcomponents. These subcomponents are often interconnected by a hardwired electrical connection such as a bus, etc. In many cases, however, some distance separates the subcomponents, preventing any convenient permanent electrical connection. Interconnected subcomponents may be separated by a few feet or even dozens of yards. Here, it is common to interconnect the remotely coupled subsystems using wires, cables, or another signal transmitting medium. These couplings are called "cable connections" in this application. Cable interconnections between subcomponents are crucial to the operation of these subcomponents as well as the overall system.
The transmission of data over cable interconnections is frequently coordinated with a clock signal, such as a square wave signal. As shown in FIG. 1, data transmissions are often broken down into multiple parts 100-105, such as bytes. Transmission and/or receipt of the individual bytes is coordinated by a clock signal. In the example of FIG. 1, the timing of each byte 100-105 has a one-to-one timing relationship with a rising edge of a clock signal 110.
Generally, it is desirable to transmit data as fast as possible to avoid delaying the operation of the subcomponents or the ultimate application program. Consequently, design engineers are constantly seeking faster and faster data rates. And, faster data rates require faster clock signals to synchronize transmission of the data, since each data byte requires a separate rising edge of the clock signal.
A number of problems can arise when a clock signal becomes too fast, however. For example, sufficiently high speed clock signals often have poorly defined edges, resulting in false clock cycle transitions. False transitions in a clocking signal may ultimately corrupt the data whose transmission depends upon the clock signal's accuracy. Therefore, the maximum data transmission speed is often limited by the maximum clock signal frequency.